Multi-standard adaptive wireless communication receivers: adaptive applications mapped on heterogeneous dynamically reconfigurable hardware

Today the world is overwhelmed with portable devices like handheld computers, mobile telephones and portable navigation systems. These devices will eventually be integrated into multi-functional devices that can perform all kinds of functions in one single system. Ultimately, portable devices will exist that can perform a wide variety of functions and provide rich information to the user. One of the challenges for implementing these integrated multi-functional devices is to define a hardware architecture that is powerful enough to process complex algorithms, flexible enough to process all kinds of algorithms, and energy efficient enough because the portable devices are battery-powered. This work focuses on the implementation of adaptive multi-standard multi-mode wireless communication systems that are implemented on dynamically reconfigurable hardware. The coarse-grained reconfigurable MONTIUM architecture is used to illustrate the mapping of wireless communication standards. Based on the mapping of different wireless communication algorithms, modifications of the MONTIUM architecture have been proposed. Baseband processing and channel decoding of different wireless communication systems have been investigated. Orthogonal Frequency Division Multiplexing (OFDM) and Wideband CDMA (WCDMA) wireless communication techniques have been mapped on a dynamically reconfigurable System-on-Chip (SoC) architecture that contains several MONTIUM Tile Processors (TPs). We showed that a single heterogeneous reconfigurable SoC platform can support various standards with a performance similar to an Application Specific Integrated Circuit (ASIC) implementation. The digital baseband processing of a HiperLAN/2 receiver and an Universal Mobile Telecommunications System (UMTS) receiver were mapped on MONTIUM TPs. Furthermore, the Viterbi and Turbo decoder algorithms were mapped on the same reconfigurable hardware. All implementations of the baseband processing and channel decoding algorithms that are mapped on the MONTIUM TP have been verified against floating-point reference models. Performance simulations on the implemented algorithms show hardly any differ-